feat: memory hdl implementation
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.gitignore
vendored
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.gitignore
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.DS_STORE
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project-5-computer-architecture/hdl/Memory.hdl
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project-5-computer-architecture/hdl/Memory.hdl
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// This file is part of www.nand2tetris.org
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// and the book "The Elements of Computing Systems"
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// by Nisan and Schocken, MIT Press.
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// File name: projects/5/Memory.hdl
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/**
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* The complete address space of the Hack computer's memory,
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* including RAM and memory-mapped I/O.
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* The chip facilitates read and write operations, as follows:
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* Read: out(t) = Memory[address(t)](t)
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* Write: if load(t-1) then Memory[address(t-1)](t) = in(t-1)
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* In words: the chip always outputs the value stored at the memory
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* location specified by address. If load=1, the in value is loaded
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* into the memory location specified by address. This value becomes
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* available through the out output from the next time step onward.
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* Address space rules:
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* Only the upper 16K+8K+1 words of the Memory chip are used.
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* Access to address>0x6000 is invalid and reads 0. Access to any address
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* in the range 0x4000-0x5FFF results in accessing the screen memory
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* map. Access to address 0x6000 results in accessing the keyboard
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* memory map. The behavior in these addresses is described in the Screen
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* and Keyboard chip specifications given in the lectures and the book.
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*/
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// * 4-way 16-bit multiplexor:
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// * out = a if sel = 00
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// * b if sel = 01
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// * c if sel = 10
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// * d if sel = 11
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// 0 - 16383 - Ram 16K
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// 16384 - 24575 Screen 8K
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// 24576 - 24576 Keyboard (1 word)
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// 16383 = 0(01)1111111111111 Ram 16k
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// 16384 = 0(10)0000000000000 Screen 8k
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// 24576 = 0(11)0000000000000 Keyboard
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CHIP Memory {
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IN in[16], load, address[15];
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OUT out[16];
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PARTS:
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// Ram16K
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Mux(a=load, b=false, sel=address[14], out=loadRam);
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Mux(a=true, b=false, sel=address[14], out=isRam);
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// Screen
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Mux(a=false, b=load, sel=address[14], out=loadScreen);
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Mux(a=false, b=true, sel=address[14], out=isScreen);
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// Keyboard
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Mux(a=false, b=true , sel=address[13], out=keyboard1);
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Mux(a=false, b=true, sel=address[14], out=keyboard2);
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// isKeyboard
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And(a=keyboard1, b=keyboard2, out=isKeyboard);
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// Logic
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RAM16K(in=in, load=loadRam, address=address[0..13] , out=outRam);
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Screen(in=in , load=loadScreen, address=address[0..12], out=outScreen);
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Keyboard(out=keyboardOut);
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// Output logic
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Mux4Way16(a=outRam, b=outRam, c=outScreen, d=keyboardOut , sel=address[13..14] , out=out);
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}
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