Files
nand2tetris/project-3-sequential-logic/bit-register-hierarchy.md
2026-01-23 10:37:30 +01:00

6 lines
156 B
Markdown

000000 → register 0 in RAM8 #0
000001 → register 1 in RAM8 #0
000010 → register 2 in RAM8 #0
...
001000 → register 0 in RAM8 #1 (high bits changed)